Company Overview:
InspireSemi has developed a novel 1500-core CPU array for high-performance scientific computing (HPC), AI, and other compute-intensive applications.
The successful candidates will join our small, elite team at an early stage and will be responsible for RTL design and verification of complex CPU and peripheral subsystems. Our work environment provides constant opportunity to learn new skills and grow professionally, including towards leadership positions.
We offer competitive salaries, benefits, and significant equity. We have a hybrid work environment and typically meet in our Austin offices 3-4 days per week. Exceptional fully remote candidates will also be considered.
Job Responsibilities
- Developing and documenting microarchitectures
- Block- and system-level RTL coding in Verilog and SystemVerilog.
- Synthesizing designs and providing timing constraints to the Physical Design team
- Working with a verification team to define the test plan and thoroughly verifying a design
Qualifications
- BS or higher degree in electrical or computer engineering
- 5+ years designing CPU cores, subsystems, and/or high-speed digital peripheral interfaces
- Expert in RTL coding, IP integration, simulation, and synthesis
- Strong verification, debugging, and PPA optimization skills
Preferred Experience
- Cadence EDA toolchain, particularly Xcelium and Genus
- Verification and quality checks (Lint, CDC, formal LEC)
- Hardware/software codesign and software-driven verification
- Familiarity with automated place and route/physical design (Innovus)
- RISC-V CPU design, including floating-point and load/store subsystems
- Low power and multi-power domain design
- Programming (C/C++/assembly) and scripting (Perl, Python, Tcl)
- Test pattern development and post-silicon debug